Design Of Neural Network Circuit Inside High Speed Camera Using Analog CMOS 0.35 ¼m Technology

Mukhlis, Yulisdin (2009) Design Of Neural Network Circuit Inside High Speed Camera Using Analog CMOS 0.35 ¼m Technology. Industrial Electronic Seminar.

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Abstract

Analog VLSI on-chip learning Neural Networks represent a mature technology for a large number of applications involving industrial as well as consumer appliances. This is particularly the case when low power consumption, small size and/or very high speed are required. This approach exploits the computational features of Neural Networks, the implementation efficiency of analog VLSI circuits and the adaptation capabilities of the on-chip learning feedback schema. High-speed video cameras are powerful tools for investigating for instance the biomechanics analysis or the movements of mechanical parts in manufacturing processes. In the past years, the use of CMOS sensors instead of CCDs has enabled the development of high-speed video cameras offering digital outputs , readout flexibility, and lower manufacturing costs. In this paper, we propose a high-speed smart camera based on a CMOS sensor with embedded Analog Neural Network.

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• Design Of Neural Network Circuit Inside High Speed Camera Using Analog CMOS 0.35 ¼m Technology. (deposited 15 Mar 2011 19:19)
  • Design Of Neural Network Circuit Inside High Speed Camera Using Analog CMOS 0.35 ¼m Technology. (deposited 06 Apr 2011 19:06)[Currently Displayed]

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